| 摘要 |
<p>PURPOSE: To prevent the occurrence of erase and change of contents of non- specified memory cells by providing a normally-open switch and a current generator to control a discharge current. CONSTITUTION: A memory cell 5 to be erased is specified. For performing the erasing, a programming voltage Vpp from a logical switch SW is connected to the cell to set a source line SRC a high voltage a normally-open switch 11 of control transistors M2 and M3 and an erase transistor M4. After completion of the erase stage, the line SRC has an erase voltage value higher than the high potential, which voltage is discharged to the ground. This causes a signal SL to be set at its high level, thus turning a switch I1 ON. This causes the voltage of the line SRC to be controlled by a current IS to continue slow discharging operation. In this way, since the discharging operation of the source line SRC is controlled to be gradually slow, the occurrence of erase/change of contents of the memory cells 5 other than the specified cell can be prevented.</p> |
