| 摘要 |
PURPOSE: To utilize a self-alignment method and simplify a process and to minimize a cell size by forming an impurity diffusion region at each upper side of a gate electrode, a side wall, and a substrate and by forming a channel region at a semiconductor layer being placed along a side wall that is opposite to a side wall where the side wall of the gate electrode is provided. CONSTITUTION: A gate insulating film 14 and a semiconductor 15 are successively formed on an insulating board 11, a gate electrode 12, and a side wall 16 of an insulating film. Furthermore, an impurity diffusion layer is formed at the gate electrode 12 and the upper side of an insulating film being placed on it, at the upper side of the side wall 16, and further at the upper side of an insulating board 11 being next to the side wall. Furthermore, the impurity diffusion layer is selectively formed on the insulating board 11 being placed at a side that is opposite to a side where the side wall of the gate electrode 12 is formed. Then, a channel region is vertically formed at a semiconductor layer 15 along the side wall of a side that is opposite to the side where the side wall of the gate electrode 12 is formed. |
