发明名称 DETECTION CIRCUIT OF DATA INPUT/OUTPUT STATE OF FIRST-IN FIRST-OUT MEMORY
摘要 <p>PURPOSE: To easily attain corrected application for the change of the size or full level of a first-in first-out memory by generating a flag according to the compared result of the number of stored data and the fullness level value of the FIFO memory. CONSTITUTION: A control signal generating part 10 outputs a clock signal obtained by the logical operation of each load, read, and write clock signal, and a mode signal to a clock counting part 20, and the counting part 20 inputs an initial value according to a load enable signal, and outputs a counted signal according to a control signal from the generating part 10. On the other hand, a fullness level value storing part 30 stores the fullness level value of data according to a load signal, a multiplexer 40 transmits an output selected from those fullness level values according to a selection signal to a comparing part 50, the comparing part 50 compares it with the output of the clock counting part 20, and transmits the output to a demultiplexer 60, and a proper state signal is outputted. Next, a flag generating part 70 outputs a flag signal indicating the fullness level value according to the state signal.</p>
申请公布号 JPH07319758(A) 申请公布日期 1995.12.08
申请号 JP19950037860 申请日期 1995.02.27
申请人 KINSEI ELECTRON KK 发明人 CHIYOU NARIMOTO
分类号 G06F11/30;G06F5/06;G06F5/14;G06F12/00;G06F13/38;(IPC1-7):G06F12/00 主分类号 G06F11/30
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