发明名称 I/O CHECK CIRCUIT
摘要 PURPOSE:To quickly perform the I/O check of an I/O control part by hardware without changing software of a CPU to one for special test by comparing the output of a designated I/O circuit with the output selected from test data. CONSTITUTION:Data from a CPU bus 3 and data from a reference data generation part 40 which selects 1 to n pieces of test data by a selector 12 are switched by a selector 13. The address from the CPU bus 3 and the address from an address generation part 30 which divides the frequency of the output signal of an oscillator 12 with a counter 11 and generate address data are switched by a selector 14. A data comparator 19 compares input data from selectors 17-1 to 17-m with data from the reference data generation part 40, and when different data are inputted, a latch signal is outputted to a FIFO 18 to take in and preserve the address at this time from the address generation part 30.
申请公布号 JPH07319780(A) 申请公布日期 1995.12.08
申请号 JP19940116391 申请日期 1994.05.30
申请人 NEC CORP 发明人 YANAI NOBUHITO
分类号 G06F11/22;G06F13/00 主分类号 G06F11/22
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