| 摘要 |
<p>An output circuit of an interface is provided with terminating resistors matched to the characteristic impedances of the signal transmission line between both ends of the transmission line and the terminating voltage. The circuit has a function to output a pulse having a polarity opposite to that of a reference potential only during the period corresponding to the signal propagation delay time of the transmission line when a low-level signal is outputted. Hence the high-level signal generated when the signal transmission line is disconnected is offset by the pulse and high-speed data transmission substantially in the signal propagation delay time is realized.</p> |
