Semiconductor device having multilayered wiring structure and method of manufacturing the same.

摘要

An amorphous silicon layer (14) is formed on the side wall of a first wiring layer (13) having a predetermined wiring width and formed in a predetermined shape by patterning. A silicon oxide layer (15) is covering the first wiring layer and the amorphous silicon layer, and a through-hole is formed in the silicon oxide layer so that a portion of the first wiring layer is exposed. A tungsten layer (17) is filling the through-hole, and a second wiring layer (18) connected to the tungsten layer is formed on the silicon oxide layer.