Synchronous counter operable in synchronism with system clock

摘要

The synchronous counter has a first switch for controlled input of a count initialising signal and for transmission of the count initialising signal to a transmission output modal point, when the input count initialising signal takes place in a non-active state. A second switch provides a controlled input of the count initialising signal and a transmission of an address signal for the transmission output modal point, when the input of the count initialising signal takes place in an active state. The address signal is directly adjustable by the second switch, without need of the adjustment of the sync. counter inside during an external address signal adjustment.