发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To miniaturize a non-volatile semiconductor memory by setting a second row line connected to a non-selection memory block to a signal of a first logical level by a second row decoder and setting a signal of a first logical level to the reference potential. CONSTITUTION:Only one column selection line CS1 is set to high voltage by a decoder output of a column decoder 42, and a MOSFET 32 for selecting a column connected to a column line C1 is turned on. At the time, all other column selection lines CS2-CSp are set to low voltage, and other FETs connected to coin lines C2-Cp are turned off. Also, only one row line W1 out of row lines W1, W2 ... is set to high voltage by an output of a row decoder 41, and a MOSFET 31 connected to a series circuit arranged in the same row is turned on. In this state, only a row line W11 is set to low voltage by an output of the decoder 41. Thereby, a MOSFET 34 is turned on, write-in voltage of high voltage Vp is applied to a node 33, and data-writing is performed.</p>
申请公布号 JPH07307093(A) 申请公布日期 1995.11.21
申请号 JP19950115749 申请日期 1995.05.15
申请人 TOSHIBA CORP 发明人 IWAHASHI HIROSHI
分类号 G11C17/00;G11C16/02;G11C16/04;G11C16/06;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/02;H01L21/824 主分类号 G11C17/00
代理机构 代理人
主权项
地址