Cascade array cell partitioning for a sense amplifier of a programmable logic device

摘要

A sense amplifier for implementing a wide or multiple input NOR gate for receiving a product term of a group of array cells in a programmable logic device (PLD). Array cells signals which are all normally received by the sense amplifier in a single product term input are instead connected to the sense amplifier in smaller groups of sub-product terms. Each smaller group of sub-product terms is then connected through a transistor cascode amplifier in the sense amplifier to form the single product term enabling a reduction of capacitance and an increase of output speed of the sense amplifier.