发明名称 Static current testing apparatus and method for current steering logic (CSL)
摘要 A static current testing method for single-ended or differential logic circuits having a static bias current in normal operation. The static current testing method includes switching a first bias node between a first bias voltage, in a normal operational mode, and a first shut-off voltage, in a first static current testing phase, and measuring the current supplied to the logic circuit in the testing phase. For differential circuits, the static current testing method further includes an additional step of switching a second bias node between the second bias voltage in the normal operational mode and the second shut-off voltage in a second static current testing phase. A bias switching means is used to switch between the normal bias voltage and the testing voltage. A cell switching means is coupled to a diode-connected transistor for forcing the circuit output low and for isolating the diode-connected transistor from the output.
申请公布号 US5469076(A) 申请公布日期 1995.11.21
申请号 US19930140348 申请日期 1993.10.20
申请人 HEWLETT-PACKARD CORPORATION 发明人 BADYAL, RAJEEV;LINN, SCOTT
分类号 G01R31/317;G01R31/28;H03K19/00;H03K19/094;(IPC1-7):H03K19/00 主分类号 G01R31/317
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