DESCRAMBLER OF THE CELL BASED PARALLEL ATM PHYSICAL LAYER

摘要

The circuit for processing the transmitted data with parallel 8 bit by using ordinary semiconductor element includes a line matching circuit(11) sampling the clock and receiving data, a processor(12) determining the cell boundary after calculating the syndrome with HEC code, a DSS demultiplexer(13) demultiplexing the input data, a cell processor(14) transferring the ATM cell layer, and an processor maintaining the OAM cell separated by the processor(14).