| 摘要 |
PURPOSE:To prevent illegal copying by changing and outputting the bit logic of a part of data stored in a second address when the data stored in a first address are read before. CONSTITUTION:Address data are inputted from an address line 67 to a ROM 64 and are simultaneously inputted to specified address decoders 21-24 for respectively recognizing the input of the specified address data. In the specified address decoder 21, when a specified address AO is allocated, RS flip-flops 25 and 26 are reset and the data of the same phase as the data outputted from the ROM 64 are outputted from output selection circuits 29 and 30. Also, when the address B is allocated to the specified address decoder 24, the data D7 of the ROM 64 are inverted by the output selection circuit 30 and the value of the data DB is outputted. Thus, the correct output value of the address B is not obtained unless the address is supplied by correct flow and copying becomes almost impossible. |
