发明名称 Integrator including an offset eliminating circuit and capable of operating with low voltage
摘要 A complete type integrator is disclosed which is designed such that the time-constant thereof can be controlled; wide input and output dynamic ranges can be achieved; operation with low power supply voltage is possible; and no offset voltage is generated. More specifically, the integrator comprises an amplifier circuit having a combination of a first and a second differential amplifier circuit (A1, A2) and connected to the input side of an integrator circuit; and an offset eliminating circuit connected to that portion of the amplifier circuit where the input signal (9) is applied. The offset eliminating circuit comprises a combination of a first, a second and a third current-mirror circuit (B1, B2, B3).
申请公布号 US5467045(A) 申请公布日期 1995.11.14
申请号 US19940329204 申请日期 1994.10.26
申请人 TOKO, INC. 发明人 TANIGAWA, HIROSHI
分类号 G06G7/184;G06G7/186;(IPC1-7):G06G7/64 主分类号 G06G7/184
代理机构 代理人
主权项
地址