发明名称 Log in-out system for logic apparatus
摘要 A plurality of logic circuits having log in-out functions are connected in sequence. A clock distribution circuit is connected to each sequential logic circuit via a corresponding one of a plurality of bidirectional lines. A mode designation signal is supplied in common to each sequential logic circuit and the clock distribution circuit. A sequential logic circuit selection signal, which selects one of the sequential logic circuits, is supplied to the clock distribution circuit. A clock signal is supplied from the clock distribution circuit to each sequential logic circuit via the bidirectional lines in the clock mode. Log in data is supplied from the clock distribution circuit to the sequential logic circuit via a specific bidirectional line in accordance with the sequential logic circuit selection signal in the log in mode. Log out data is supplied to the clock distribution circuit from the sequential logic circuit in the log out mode via a specific bidirectional line in accordance with the sequential logic circuit selection signal.
申请公布号 US4145749(A) 申请公布日期 1979.03.20
申请号 US19770836077 申请日期 1977.09.23
申请人 FUJITSU LIMITED 发明人 YOSHIMURA, TATSURO;TSUCHIMOTO, TAKAMITSU;HAMADA, KATSUYUKI
分类号 G06F13/42;G06F7/76;(IPC1-7):G01R15/00;G11C7/00;G11C17/00 主分类号 G06F13/42
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