发明名称 |
Direct memory access controller handling exceptions during transferring multiple bytes in parallel |
摘要 |
A direct memory access controller (DMAC) is provided to transfer bytes from arbitrary offset byte boundaries while performing data check operations in parallel to the movement of data in parallel through the DMA controller. The DMA controller moves data during each memory cycle and validates the moved data at the destination memory during the writing of bytes to the destination address. |
申请公布号 |
US5465340(A) |
申请公布日期 |
1995.11.07 |
申请号 |
US19920828358 |
申请日期 |
1992.01.30 |
申请人 |
DIGITAL EQUIPMENT CORPORATION |
发明人 |
CREEDON, TADHG;O'NEILL, EUGENE G.;O'CONNELL, ANNE |
分类号 |
G06F11/00;G06F13/28;(IPC1-7):G06F13/26 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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