Apparatus for programming the speed at which an expansion card generates ready signals to insure compatibility with the speed of an attached bus

摘要

An apparatus is disclosed for processing information including a bus, a controller circuit, the controller circuit being configured to control transfer of information over the bus, and a slave circuit. The slave circuit includes a slave timing circuit which variably generates a ready signal indicating when the slave can accept data to allow the slave circuit to function in computer systems having different bus speeds. The controller circuit and the slave circuit exchange information via the bus at a speed controlled by the ready signal.