发明名称 |
Method of fabricating integrated devices |
摘要 |
A method comprising the steps of depositing a first and second polysilicon layer, separated by an oxide layer; selectively etching the second polysilicon layer to form first gate regions; forming first substrate regions in the substrate and laterally in relation to the first gate regions; selectively etching the first polysilicon layer to form second gate regions of a length greater than the first gate regions; and forming in the substrate, laterally in relation to the second gate regions and partially overlapping the first substrate regions, second substrate regions of a higher doping level than the first substrate regions.
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申请公布号 |
US5464784(A) |
申请公布日期 |
1995.11.07 |
申请号 |
US19930129689 |
申请日期 |
1993.09.30 |
申请人 |
SGS-THOMSON MICROELECTRONICS S.R.L. |
发明人 |
CRISENZA, GIUSEPPE;CLEMENTI, CESARE |
分类号 |
H01L21/8234;H01L21/8238;H01L21/8247;H01L27/088;H01L27/092;H01L27/10;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824;H01L21/266 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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