发明名称 Fetch and store buffer that enables out-of-order execution of memory instructions in a data processing system
摘要 A method and device for handling fetch and store requests in a data processing system is provided. A fetch and store buffer comprises a store queue, a fetch queue, a register, a comparator, and a controller. The store queue and the fetch queue receive requests from one or more execution units. When the fetch queue receives a fetch request from an execution unit, it sets a mark in a field associated with the request indicating the store queue entries present at the time the fetch request is entered, and further, removing a mark from the field when the associated store queue entry is drained. The controller gates a copy of the fetch request in the fetch queue into the memory unit address register and to the memory unit, when the memory unit is ready to accept a request. The comparator determines if there is a dependency between the gated request in the memory unit address register and any store queue entries marked in the gated request's field. When a dependency is determined by the comparator, the controller drains the store queue entries marked in the pending fetch request's field from the store queue prior to draining the fetch queue entries.
申请公布号 US5465336(A) 申请公布日期 1995.11.07
申请号 US19940269868 申请日期 1994.06.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 IMAI, BENJAMIN T.;LE, HUNG Q.;NGUYEN, DUNG Q.
分类号 G06F9/38;G06F9/46;G06F9/48;(IPC1-7):G06F9/38 主分类号 G06F9/38
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