| 摘要 |
The phase synchronisation circuit for two periodic signals for radio time code synchronised clocks has a pulse generation circuit (6,7) for the first signal (1) to generate synchronising signal (D), a combiner logic gate (8) combining signals (E) and (D),a further flip-flop (9) generating synchronisation end signal (G).A second combining circuit (13) combines the second input signal (I) with end signal (G). The circuits (15,17) coupled to combiner (13) is periodically shifted by the phase of the first input signal (B). A signal capture period is formed in either of the synchronisation signals (D,E) where the second circuit (15,17) shifts the phase of the first input signal (D) until the capture period of the two synchronisation signals (D,E) coincide. |
