摘要 |
<p>A radio selective calling receiver can improve the precision of a time display up to the clock precision of a reception signal from a base station. A bit synchronization section 103 establishes bit synchronization of a digital signal from a reception section 102 to output a reproduction clock d. A frequency divider for timepiece function 109 frequency-divides an insufficiently-precise reference clock from a reference clock generation section 107, by a fixed value while the digital signal is in a frame step-out state as indicated by a frame-detector 105. While the digital signal is in a frame synchronized state, the frequency divider 109 variably frequency-divides the reference clock by using a phase correction signal for correcting an internal phase advance/delay, which is output from the bit synchronization section 103, thereby correcting a gain/loss in time displayed on a display section 110. <IMAGE></p> |