发明名称 Semiconductor memory device with built-in confirmation unit for accelerating test
摘要 Memory cells incorporated in a semiconductor memory device are subjected to an accelerating test before delivery to a purchaser for screening out defective products, and a word line driver unit selectively drives word lines to a test voltage level higher than a standard power voltage level to word lines for strongly biasing the memory cells, wherein a confirmation unit has a first monitoring circuit for producing a warning signal indicative of the standard power voltage level supplied to the word line driver unit in the accelerating test, a second monitoring circuit for producing a detecting signal indicative of the test voltage level, and a non-volatile memory circuit enabled with the detecting signal for storing the warning signal in a readable manner so that an analyst can confirms the accelerating test duly carried out.
申请公布号 US5463636(A) 申请公布日期 1995.10.31
申请号 US19930067980 申请日期 1993.05.27
申请人 NEC CORPORATION 发明人 NAKAYAMA, HIROSHI
分类号 G11C29/00;G01R31/28;G11C29/06;G11C29/44;G11C29/50;(IPC1-7):G11C29/00;G11C8/00 主分类号 G11C29/00
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