发明名称 |
Adaptive write-back method and apparatus wherein the cache system operates in a combination of write-back and write-through modes for a cache-based microprocessor system |
摘要 |
Method and apparatus for reducing the access time required to write to memory and read from memory in a computer system having a cache-based memory. A dynamic determination is made on a cycle by cycle basis of whether data should be written to the cache with a dirty bit asserted, or the data should be written to both the cache and main memory. The write-through method is chosen where the write-through method is approximately as fast as the write-back method. Where the write-back method is substantially faster than the write-through method, the write-back method is chosen.
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申请公布号 |
US5463759(A) |
申请公布日期 |
1995.10.31 |
申请号 |
US19950419736 |
申请日期 |
1995.04.10 |
申请人 |
OPTI, INC. |
发明人 |
GHOSH, SUBIR K.;BHATTACHARYA, DIPANKAR |
分类号 |
G06F12/02;G06F12/08;(IPC1-7):G06F12/00;G06F12/12;G06F13/00 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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