| 摘要 |
A multivalued subtractor for processing a multiplication of a first data and a second data, which are one of binary logic and multivalued logic, includes a first and second input circuit. The first input circuit includes parallel inputs for binary logic and multivalued logic, and receives the first data. The first input circuit also outputs a first set of bit data representing the first data. Similarly, the second input circuit includes parallel inputs for binary logic and multivalued logic, and receives the second data. The second input circuit also outputs a second set of bit data representing the second data. A subtracting circuit, connected to the first and said second input circuits, subtract the second set of bit data from the first set of bit data. A output circuit, connected to the subtracting circuit, converts the output of the subtracting circuit into data in binary logic and multivalued logic, in parallel, and outputs converted data in binary logic and multivalued logic, in parallel.
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