发明名称 |
Method of making a semiconductor device with sidewall etch stopper and wide through-hole having multilayered wiring structure |
摘要 |
An amorphous silicon layer is used as an etch stop and is formed on the side wall of a first wiring layer having a predetermined wiring width and formed in a predetermined shape by patterning. A silicon oxide layer is covering the first wiring layer and the amorphous silicon layer, and a through-hole is formed in the silicon oxide layer so that a portion of the first wiring layer is exposed. The width of the through-hole is equal to or larger than the wiring width of the first wiring layer. A tungsten layer is filling the through-hole, and a second wiring layer connected to the tungsten layer is formed on the silicon oxide layer.
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申请公布号 |
US5462893(A) |
申请公布日期 |
1995.10.31 |
申请号 |
US19940231974 |
申请日期 |
1994.04.20 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
MATSUOKA, FUMITOMO;IKEDA, NAOKI |
分类号 |
H01L21/768;H01L23/29;H01L23/522;(IPC1-7):H01L21/44 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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