| 摘要 |
PURPOSE:To extremely increase the lock time speed by switching plural time constants of a filter circuit by a PLL circuit and therefore changing the natural angle frequency and the damping factor so as t6 best follow the transient response state when the frequency is changed. CONSTITUTION:A VCO 3 increases the frequency up to f1 from f0 for reception of the next channel in a state where the VCO 3 is oscillating in the frequency f0. This frequency changing command is received by a control unit 15 which generates a dividing ratio for the change of frequency. This dividing ratio is set to a divider 13 while a set pulss PS is generated at a time point t0. The output Q of each flip-flop F0 is set at a high level owing to generation of the pulse PS, and the switch signals U1-U4 are all set at high levels. Thus all switches S1-S4 are turned on. As a result, the resistances R11-R15 are connected in parallel to each other and the synthetic rsistance is set at r1A. This synthetic resistance is set at to right after the switching of frequency and then at r1A so that the angle frequency OMEGAn and the damping factor zeta are increased. |
