发明名称 PROCESSING SYSTEM AND ARITHMETIC METHOD
摘要 PURPOSE: To provide an arithmetic processing system and method in which the processing delay of a correct instruction is less after a branch was decided to be erroneous. CONSTITUTION: A 1st instruction is processed in response to a branch instruction and a storage location is related to a 1st instruction prior to execution of a branch instruction. A 2nd instruction is processed independently of information stored before in the storage location in response to the execution of the branch instruction and the storage location is related to the 2nd instruction prior to the end of the branch instruction.
申请公布号 JPH07281893(A) 申请公布日期 1995.10.27
申请号 JP19950014216 申请日期 1995.01.31
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 MAABIN ANSERU DENMAN;AATEII ATOUERU PENINGUTON;SONYON PIITAA SON
分类号 G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/38
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