| 摘要 |
<p>The present invention is a system logic controller ('SLC') (24) specially adapted for reducing and regulating a personal computer's ('PC's') (10) electrical power consumption. The PC (10) includes a CPU (12) and a direct port access buffer (82) between which the SLC (24) exchanges data that regulates the PC's power consumption. The SLC (24) reduces power consumption by low-power timed interval interrupt generators (142a, 142b through 142n). If the PC (10) enters a low-power 'suspend' operating mode in which the CPU (12) is turned off, the SLC (24) permits quickly resuming normal operation. If the PC (10) incorporating the improved SLC (24) includes a super I/O chip (54) and/or PCMCIA sockets (72), the SLC (24) permits higher speed operation both of a hard disk connected to the super I/O chip (54), and/or of high speed PCMCIA cards. Furthermore, the SLC (24) prevents the application of an excessively high voltage to PCMCIA cards if the PC enters its 'suspend' operating mode.</p> |
