Staring focal plane array architecture for multiple applications.

摘要

The staring focal plane architecture uses a frame buffer, which may be implemented in the array unit cell or external to the unit cell. The array system includes a staring focal plane array with detector elements and charge receiving elements, a charge receiving element associated with each detector elements. The frame buffer includes storage elements, a storage element associated with each detector element, in two sections, on opposite sides of the focal plane array. A multiplexer serially transfers data from a selected subset of the group of storage elements. The buffer storage elements may be sample-and-hold circuits. Data is periodically transferred from each charge receiving element to the associated storage element in the frame buffer. Pref. digital logic selects data in the frame buffer to be transferred by the multiplexer in response to external inputs. The focal plane array and frame buffer are pref. formed in a single integrated circuit.