发明名称 VARIABLE LENGTH CODING DECODING CIRCUIT
摘要 PURPOSE:To decode a variable length code in one cycle. CONSTITUTION:A variable length code string IN is shifted to the left so that a variable length code being a current decoding object comes to a head based on an address of a variable length code being the current decoding object stored in a pointer register 9 with a 1st shifter 2, an output signal S2 of the 1st shifter 2 for the variable length code decoded at present is shifted left to allow a variable length code to be decoded next to come to a head and the result is outputted to a code register 4. The code register 4 latches the code at a rising of a clock CLK to provide an output to a ROM circuit 5. The ROM circuit 5 uses an address outputted from the code register 4 to provide an output of a variable length code and a parameter. A parameter register 6 provides an output of a parameter 6 to an output terminal OUT. Sets of variable length code length are summed up by an adder 8 and the address of a current variable length code string IN is outputted to a pointer register 9.
申请公布号 JPH07273666(A) 申请公布日期 1995.10.20
申请号 JP19940056953 申请日期 1994.03.28
申请人 OKI ELECTRIC IND CO LTD 发明人 KOMOTO EIJI
分类号 H04N19/44;H03K5/13;H03M7/40;H03M7/42;H04N7/24;H04N19/00;H04N19/423;H04N19/625;H04N19/85;H04N19/91 主分类号 H04N19/44
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