| 摘要 |
PURPOSE:To compare a found compressed value with an expected compressed value by using a parallel input linear feedback shift register which has compressed data. CONSTITUTION:The test circuit which tests whether or not the semiconductor integrated circuit (e.g. memory) is correct or not, compresses data I1-I4 read out of the memory by a sequential parallel input linear LFSR 1 to find a compressed signature, and then supplies the output of the register S4 of the final stage to the 1st input of a two-input exclusive OR gate XOR1 positioned at the left end by a feedback information selecting means SEL0. The outputs of registers S2-S4 positioned in front of them are supplied to 1st inputs of other exclusive OR gates XOR2-XOR4. Input selectors SEL1-SEL4 select expected signatures E1-E4 of an expected signature storage register 2 and supply them to 2nd inputs of the respective exclusive OR gates XOR2-XOR4. Therefore, the exclusive OR gates XOR2-XOR4 compare the compressed values with expected compressed values. |
