| 摘要 |
PURPOSE:To make easy the forcible setting of the logic state of a node in a circuit to be tested, and improve testing work efficiency. CONSTITUTION:A test data memory circuit 2 temporarily retains logic state monitored from a node A within a circuit to be tested, or logic state forcibly set for the node A. A test data I/O switch 3 turns on and off a circuit between the circuit 2 and a sensing wire S according to a signal from a probe wire P. According to this construction, the logic state of the node A can be externally monitored via the wire S with switch 3 turned on. Also, even when the switch 3 is turned off in the state of a logic written in the circuit 2 from the outside, the logic state of the node A can be forcibly set. |
