DEPLETION TRANSISTOR TYPE DELAYED CIRCUIT

摘要

a PMOS transistor which has an input signal applied to the gate thereof and has a power supply voltage connected to the source thereof; a first depletion transistor which is connected to a drain of the PMOS transistor to the drain therof and has the gate and source connected to each other; a second depletion transistor which is connected to the gate and source of the first depletion transistor to the drain therof and has the gate and source connected to each other; and an NMOS transistor which is connected to the gate and source of the second depletion transistor to the drain therof, has the input signal applied to the gate thereof and has a ground potential connected to the source thereof.