| 摘要 |
PURPOSE: To resolve a timing problem brought about in studio circumstances by performing adjustment for an apparent electric signal path length to a decoder. CONSTITUTION: A microprocessor 56 preliminarily receives delay data corresponding to each of composite video input signal sources and stores these data in a memory 58. The microprocessor 56 monitors selection information, which a local interface 48 or a remote interface 50 can use, and automatically recovers corresponding delay data from the memory 58 and sends a proper delay control signal to a timing circuit 54 to execute selection. The timing circuit 54 monitors the input selected by a selector 46 to obtain the start time of a frame. The timing circuit 54 generates an input pulse in response to this time to start the operation of a FIGO 52 where the selected input signal is stored. After delay with the delay control signal from the microprocessor 56, an output pulse is generated to start output from the FIFO 52.
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