发明名称 GATE FOR CONNECTING DIGITAL LOGIC CIRCUITS
摘要 <p>This gate is named as a junction gate. The junction gate includes not only an AND gate and OR gate, but also a D-FF (D-type flip-flop) represented by the 74LS74. The junction gate has a function to acquire and hold the output by use of an RS-FF (FF of a reset-set input type) only when the output or input signal changes. The junction gate can be handled in the same manner whether the type of input data is asynchronous or synchronous. The tsu (input setup time) is zero. Unlike the gate of a general logic circuit, the junction gate is defined as follows: this is a logic circuit whose output Y(t) at a certain point of time is not dependent on the input X(t) at that point of time, but is dependent only on the input X(t - δ) which is received before that point of time, where (the propagation time from the input to the output of the junction gate) is « δ » .</p>
申请公布号 WO1995028037(P1) 申请公布日期 1995.10.19
申请号 JP1994000595 申请日期 1994.04.08
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