| 摘要 |
The frame filtering circuit includes a cam-chip controller(1) for generating transmission bus latch signal, a record enable signal(W), and a command selection signal by checking formax+ states, a transmission bus latch(2) for converting 8-bit data of a formax+ into 16-bit data, a memory(3) for registering output signal of the transmission bus latch(2) as a primitive address and for generating 8 bit match signal by checking destination address of next frame data, and a match signal generator(4) for controlling frame reception process in the formax+.
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