Planarization process for the manufacturing of integrated circuits, particularly for non-volatile semiconductor memory devices.

摘要

A planarization process for the manufacturing of integrated circuits, particularly for non-volatile semiconductor memory devices, comprises the steps of: forming a first layer (12) of undoped oxide acting as a barrier layer over a semiconductor substrate (3) wherein integrated devices (M,MC1,MC2) have been previously obtained; forming a second layer (13) of oxide containing phosphor over the first undoped oxide; forming a third layer (14) of oxide containing phosphor and boron over the second oxide layer, the concentration of phosphor being lower than or equal to the concentration of boron; performing a thermal process at a temperature sufficient to melt the third oxide layer (14), to obtain a planar surface.