发明名称 Link error monitoring
摘要 In a communication network, an efficient link error monitor is provided that completely relieves the microprocessor of computing the link error rate and comparing it with link error rate thresholds. The link error rate computation and the comparison are performed by the physical layer of a communication station. The physical layer generates an interrupt to the microprocessor only if a threshold is crossed and a microprocessor action may be required. The physical layer includes a number of registers that can be conveniently written by the microprocessor to designate the thresholds and monitor the link errors. The link error rate is estimated using a simple estimator that provides a realistic link error rate estimate even at early stages of operation when few link errors have been detected and when, therefore, little statistical information on the link error rate exists.
申请公布号 US5459731(A) 申请公布日期 1995.10.17
申请号 US19930083591 申请日期 1993.06.24
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 BRIEF, DAVID C.;TORGERSON, JAMES F.;HAMSTRA, JAMES R.
分类号 G06F11/34;H04L1/20;H04L12/26;H04L12/433;(IPC1-7):G06F11/00 主分类号 G06F11/34
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