BUS ARRANGEMENT FOR DIGITAL SIGNAL PROCESSING CHIP

摘要

The structure for transmitting a unit data between function blocks such as a memory unit, a logic unit, a multiplier unit, a register file unit, a control unit, and a digital signal processor chip, comprises a plurality of local buses for transmitting data under an electric connection with the blocks; a plurality of all buses for transmitting the data by being electrically connected to the local buses; and a bus on/off switching control part for selectively controlling the buses by connection with the buses.