发明名称 TIMING COINCIDING CIRCUIT SIMULTANEOUSLY SUPPLYING TWO POWER SUPPLY VOLTAGES APPLIED IN DIFFERENT TIMING
摘要 An improved DRAM includes a main circuit and an output driver circuit, respectively, energized by externally applied two power supply voltages. The DRAM includes a timing coinciding circuit for making the supply-timing of the two power supply voltages to the circuits coincided to each other. When power supply voltage only is applied, output driver circuit has a tendency to consume an excessive penetrating current in response to an unstable output signal provided from main circuit. Even though the two power supply voltages are applied in different timing, the excessive current consumption in the output driving circuit is avoided, since timing coinciding circuit simultaneously starts and ends the supply of output power supply voltages.
申请公布号 KR950012025(B1) 申请公布日期 1995.10.13
申请号 KR19920009012 申请日期 1992.05.27
申请人 MITSUBISHI ELECTRIC CORP. 发明人 YUKINOBU, ADACHI
分类号 G11C11/407;G11C5/14;G11C11/4074;G11C11/409;G11C11/413;H01L21/8242;H01L27/10;H01L27/108;(IPC1-7):G11C11/40 主分类号 G11C11/407
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