发明名称 TIMING CONTROL CIRCUIT FOR INTER-PROCESSOR COMMUNICATION USING COUNTER
摘要 The circuit comprises a setup and counter(11) for assigning bus occupation priority and counting time for the next occupation priority, an external circuit connector(12) for processing request signals from a serial communication control block(3), and a timing control unit(13) for limiting bus occupation time by using communication start signal and timing data from the counter.
申请公布号 KR950012319(B1) 申请公布日期 1995.10.16
申请号 KR19920026084 申请日期 1992.12.29
申请人 KOREA ELECTRONICS AND TELECOMMUNICATION RESEARCH INSTITUTE 发明人 PAEK, SUNG - JUN;LEE, SUK - JIN;IM, SUNG - CHOL;KIM, MIN - TAEK
分类号 H04L12/413;(IPC1-7):H04L12/413 主分类号 H04L12/413
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