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摘要 921,946. Electric selective signalling systems. STANDARD TELEPHONES & CABLES Ltd. March 17, 1961 [March 24, 1960], No. 9848/61. Class 40(1). A system is described for receiving an item of data in an error correcting code and for recognising the data even if it contains an error. The principle used for recognising each item of data received is to compare it with pre-stored " correct " representations of all possible items and to select that item which it matches most nearly. This system will function correctly providing that the number of errors in any one item does not exceed the error correcting capacity of the particular code employed. The particular code described uses 7-bit words to represent 16 different items of data, i.e. 3 bits are redundant, and this permits any one bit of each 7-bit word to be in error without the identity of the item being lost. This effectively means that there are 8 different 7-bit words to represent each of the 16 items of data. For each item one of the 8 different 7-bit words is chosen as the "correct" representation and the other 7 7-bit words are arranged that each differs from the correct word in only one bit position. Each " correct " word is " stored " on one core by a particular pattern of 7 windings, the pattern corresponding to the bit-combination of the word. Thus Fig. 2 shows a single core 10 having a pattern of windings corresponding to a " correct " 9. If a correct 9 is received this results in 7 units of positive flux being produced in the core. If an incorrect 9 is received only a net positive flux of 5 units will be produced since one bit will be wrong. If, however, any other item is received, whether correctly or with one error, then less than 5 units of positive flux will be produced since the code is so arranged that every " correct " word differs from each other in at least three bit positions. Thus, in Fig. 2 only a correct or incorrect 9 produces 5 or more units of positive flux. In Fig. 3 the single core 10 of Fig. 2 is replaced by a set of 7 cores and one set is provided for each of the 16 correct words. In response to an incoming word on leads 16 only one set of cores will produce a net positive current of 5 or more units in an output row conductor 15. The output conductors 15 have a - 4 bias applied to them by a column conductor 17a. Thus as a result for each word received only one conductor 15 has a net positive current of one or more units induced in it, which current, by means of 4 further cores produces 4 bits representing the item received. The circuit shown in Fig. 3 can also function in reverse in order to re-code 4-bit words into the 7-bit error correcting code. If the number of items is large instead of comparing each incoming item simultaneously with every correct item it can be done successively by a switching arrangement using a single core as on Fig. 2 (Fig. 4, not shown). Specification 697,744 is referred to.
申请公布号 DE1148593(B) 申请公布日期 1963.05.16
申请号 DE1961J019652 申请日期 1961.03.24
申请人 INTERNATIONAL STANDARD ELECTRIC CORPORATION 发明人 PLOUFFE ROBERT L.;SCHREINER STANLEY M.
分类号 H03M1/00;H03M13/05 主分类号 H03M1/00
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