Electrically alterable read only memory comprising test functions.

摘要

The flash EEPROM memory undergoes a test procedure, using an address generator producing row and column addresses. These are used in the programming of the memory before erasure. Operation in test mode is determined by a test word (T1). During the course of a test, counters for both row and column provided by the generator (11) are selectively incremented by an incrementation signal (INC). This is provided by a control unit (2) executing a programming algorithm before erasure. <IMAGE>