NOTCHED INSULATION GATE STATIC INDUCTION TRANSISTOR INTEGRATED CIRCUIT

摘要

A notched insulation gate static induction transistor integrated circuit according to the present invention comprises an enhancement mode CMOS logic circuit (a, b) including a notched insulation gate static induction transistor in which a threshold voltage is determined to prevent current from flowing in a standby mode, and a depletion enhancement mode CMOS logic circuit (c, d) including a notched insulation gate static induction transistor in which a threshold voltage is determined to cause current to slightly flow in the standby mode. The enhancement mode CMOS logic circuit (a, b) and the depletion enhancement mode CMOS logic circuit (c, d) are formed on a major surface of a substrate (10), and the depletion enhancement mode CMOS logic circuit (c, d) is used in a circuit in which an average power consumption in a switching operation is higher than that in the standby mode.