发明名称
摘要 PURPOSE:To reduce the current consumption in refreshing operation by incorporating a defective address storage circuit which inhibits a column system from operating in refreshing operation mode if there if a defective address and a redundancy circuit which switches a memory array to a stand-by memory array in a RAM. CONSTITUTION:Stand-by memory array YR-ARY elements 1 and 2 are provided to remedy faults of memory array M-ARY elements 1 and 2 and a defective address signal is compared by an address comparator AC with address signals a0-an supplied from an address buffer C-ADB. Then if there is a defective bit array, the memory array elements are switched to the memory array element 1 or 2 for redundancy, and the operation of a storage circuit included in the comparator AC is stopped so as to reduce the power consumption of the address storage circuit. This storage circuit is provided with a fuse means made of polycrystal Si and the means F2 is blown by an MOSFET for writing or by being irradiated with a laser light beam.
申请公布号 JPH0795393(B2) 申请公布日期 1995.10.11
申请号 JP19850134005 申请日期 1985.06.21
申请人 发明人
分类号 G11C11/401;G11C11/34;G11C11/406;G11C11/41;G11C29/00;G11C29/04;(IPC1-7):G11C11/41 主分类号 G11C11/401
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