发明名称 |
Method for forming gigaohm load for BiCMOS process |
摘要 |
An integrated circuit including a high value resistor (17d) is formed by using an amorphous silicon layer. The amorphous silicon layer may also be used to form the second plate (34) of a capacitor (17c) and a fuse (30). In the second embodiment of the invention, the amorphous silicon layer (92) is formed after the formation of the devices to avoid any additional high temperature cycles.
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申请公布号 |
US5457062(A) |
申请公布日期 |
1995.10.10 |
申请号 |
US19940300580 |
申请日期 |
1994.09.02 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
KELLER, STEPHEN A.;SHAH, RAJIV R. |
分类号 |
H01L27/06;(IPC1-7):H01L21/265 |
主分类号 |
H01L27/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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