发明名称 |
method of manufacturing a new DRAM capacitor structure having increased capacitance |
摘要 |
A method for fabricating a stacked storage capacitor on a dynamic random access memory (DRAM) cell with increased capacitance was accomplished. The stacked capacitor is used with a field effect transistor (FET) as part of a dynamic random access memory (DRAM) cell for storing data in the form of stored charge on the capacitor. The method for making the capacitor involves forming a bottom electrode from a single polysilicon layer having a fin-shaped structure, and then using a second polysilicon layer and a plasma etch back to create a second self-aligned fin-like structure that significantly increases the surface area of the capacitor bottom electrode. The capacitor structure is then completed by forming a thin capacitor dielectric layer on the bottom electrode and depositing a third polysilicon layer to form the top electrode and complete the capacitor with significantly increased capacitance and an economy of processing steps.
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申请公布号 |
US5457065(A) |
申请公布日期 |
1995.10.10 |
申请号 |
US19940355490 |
申请日期 |
1994.12.14 |
申请人 |
UNITED MICROELECTRONICS CORPORATION |
发明人 |
HUANG, CHENG H.;LUR, WATER |
分类号 |
H01L21/8242;H01L27/108;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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