| 摘要 |
PURPOSE:To obtain a semiconductor storage device, in which the increase of the area of a chip can be inhibited and the consmption of stepped-up potential is also reduced. CONSTITUTION:Word lines WL0-WLn, to which a memory cell 10 is connected, word-line selector circuits 16-0-16-n containing low decoders 13-0 to 13-n, in which a pre-charge signal and an address signal group are input, and a level conversion circuit 15 are provided. The pre-charge signal in the pre-charge signal and the address signal group is level-converted by the level conversion circuit 15, and input to the low decoder. |
