发明名称 |
Method and apparatus for conducting bus transactions between two clock independent bus agents of a computer system using a transaction by transaction deterministic request/response protocol |
摘要 |
An apparatus and method for communicating characteristics about a memory module to a processor unit. A method and apparatus for communicating memory module characteristics, such as whether the module can communicate in a deterministic mode, memory size, memory speed, memory type and whether the memory is cachable to a processor. In the present invention, the processor asserts a request signal onto the system bus and the memory module corresponding to the address of the request respond with information regarding its characteristics.
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申请公布号 |
US5455957(A) |
申请公布日期 |
1995.10.03 |
申请号 |
US19950394560 |
申请日期 |
1995.02.27 |
申请人 |
INTEL CORPORATION |
发明人 |
PAWLOWSKI, STEPHEN;MACWILLIAMS, PETER D. |
分类号 |
G06F12/00;G06F12/06;G06F12/08;G06F13/16;G06F13/42;(IPC1-7):G06F13/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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