3V to 5V receiver/translator using a 5V supply and a 3V reference

摘要

A circuit that translates one voltage level to another voltage level. In one embodiment of the invention, an input buffer translates a 3 volt level to a 5 volt level. Such an input buffer facilitates communications between 3 volt I/Os and 5 volt core logic and memories. And while the input buffer is described as being ideal for communications between 3 volt I/Os and 5 volt core logic and memories of a gate array, the translator circuitry of the invention can be used in a wide variety of electronic devices where a chip operating on 5 volts must interface with a 3 volt system.