发明名称 |
Decimation filter and method |
摘要 |
Programmable decimation filter made of integrators and combs with a shortened first integrator register and with a single subtractor plus memory for the combs subtractions. The comb subtractions are serially performed with read/write accesses to the memory. A shifter between the first and second integrator registers provides application to low decimation rates and the shortened register relates to device error rate at high decimation rates.
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申请公布号 |
US5455782(A) |
申请公布日期 |
1995.10.03 |
申请号 |
US19920930169 |
申请日期 |
1992.08.14 |
申请人 |
HARRIS CORPORATION |
发明人 |
YOUNG, WILLIAM R.;CHESTER, DAVID B. |
分类号 |
H03H17/04;(IPC1-7):G06F15/31 |
主分类号 |
H03H17/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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